1. Field of the Invention:
The present invention relates to a clock abnormality detecting apparatus for detecting the abnormality of a clock in a microcomputer installed in a controller used for motor vehicles.
2. Description of the Related Art:
A conventional clock abnormality detecting apparatus is disclosed in Japanese Patent Laid-Open Publication No. HEI 6-83474, which comprises a reference clock oscillator for generating a reference clock pulse or signal that schedules the operation of a microcomputer, and another clock oscillator for generating a second clock pulse or signal. The reference clock signal and the second clock signal are compared with each other so that the abnormality of the reference clock signal or the reference clock generator can be detected according to the result of comparison.
To this end, the disclosed clock abnormality detecting apparatus includes a comparator for performing comparison between the reference clock signal and the second clock signal. The comparator is composed of a plurality of flip-flops connected in tandem or cascade so that when the reference clock signal is normal, a judgment signal at the output of the flip-flops is high, and when the reference clock signal is not normal (due, for example, to malfunctioning of the reference clock oscillator), a judgment signal at the output of the flip-flops is low.
However, due to the separate clock oscillator required to produce the second clock signal in addition to the reference clock signal for the purpose of determining the normality/abnormality of the reference clock signal, the conventional clock abnormality detecting apparatus is rendered complicated in construction and expensive to manufacture.
The separate clock oscillator may pose another problem that when the separate clock oscillator is in the abnormal condition due to operation failure, for example, the reference clock signal and the reference clock oscillator are determined as being not normal even though they are in the normal condition.